Prof. Jong-Yeol Lee 사진
Prof. Jong-Yeol Lee
ENG NAME
Jong-Yeol Lee
MAJOR
SoC Design
POSITION
Professor
TEL
270-4140
EMAIL
jong@jbnu.ac.kr
SPHERE
SoC Design

Detailed Description

Timed-Compiled Code Functional Simulation of Embedded Software for Performance Analysis of SOC Design

Address Code Generation for DSP Instruction Set Architectures

Loop and Address Code Optimization for Digital Signal Processors

Career

KAIST